A DC–4-GHz True Logarithmic Amplifier: Theory and Implementation
نویسندگان
چکیده
A 40-dB dynamic range, dc–4-GHz parallel-summation logarithmic amplifier is presented in this paper. The amplifier realizes a piecewise approximation to an exact logarithmic response. A design procedure that yields breakpoints on the exact response is described, along with delay-matching networks for parallel-summation logarithmic amplifiers. The amplifier was constructed in a 35-GHz silicon bipolar process, has 5 dB logarithmic conformity over a dc–4-GHz bandwidth and has rise and fall times of 100 ps. The integrated circuit has dimensions of 2 2 mm and consumes 750 mW from a 5-V supply.
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